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P1202 / P1301 L-ESD set

ESD Langer Pulse H 0.2/2.5 E 0.2/5.5 ns Field Coupling

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  • P1202 / P1301 L-ESD set, ESD Langer Pulse H 0.2/2.5 E 0.2/5.5 ns Field Coupling
  • Measurement set-up with P1202 L-ESD Magnetic Field Source Langer Pulse 0.2/2.5 ns
    Measurement set-up with P1202 L-ESD Magnetic Field Source Langer Pulse 0.2/2.5 ns
  • Measurement assembly with P1202 L-ESD (The devices marked * are not includedin the scope of delivery.)
    Measurement assembly with P1202 L-ESD (The devices marked * are not includedin the scope of delivery.)
  • Scope of delivery P1202 / P1301 L-ESD set
    Scope of delivery P1202 / P1301 L-ESD set
P1202 / P1301 L-ESD set, ESD Langer Pulse H 0.2/2.5 E 0.2/5.5 ns Field Coupling Measurement set-up with P1202 L-ESD Magnetic Field Source Langer Pulse 0.2/2.5 ns Measurement assembly with P1202 L-ESD (The devices marked * are not includedin the scope of delivery.) Scope of delivery P1202 / P1301 L-ESD set
  • P1202 / P1301 L-ESD set, ESD Langer Pulse H 0.2/2.5 E 0.2/5.5 ns Field Coupling
  • Measurement set-up with P1202 L-ESD Magnetic Field Source Langer Pulse 0.2/2.5 ns
  • Measurement assembly with P1202 L-ESD (The devices marked * are not includedin the scope of delivery.)
  • Scope of delivery P1202 / P1301 L-ESD set
Short description

The field sources, which are included in the probe set field coupling 200 ps Langer ESD, generate very fast electric and magnetic ESD pulse fields. With these fields, ICs are defined and reproducibly pulsed to determine their immunity against ESD fields.
The reason for this is the ESD immunity of PC boards and electrical devices. The immunity is tested (IEC 61000-4-2). During the tests, standard ESD pulse fields and very fast electric and magnetic fields (200 ps) are generated by coupled ESD interference into the PC boards. These fields affect the PC board surface and penetrate the IC casings. If fields penetrate the ICs, disturbance events will be generated. The IC interference via magnetic or electrical fields is a significant source of interference path in addition to conducted coupling of ESD interference above the ICs.
From the probe set, knowledge will be gained of the IC EMC behaviour and this can be streamlined into the development of the PC board.
Expensive redesigns are avoided and development costs are reduced.
Furthermore, the use of the test methods for the determination of IC EMC parameters enables the IC producer to develop ICs more efficiently.
The test set-up needs the ICE1 test system and external devices.

Scope of delivery
Scope of delivery details